How does a biquinary adder work? Announcing the arrival of Valued Associate #679: Cesar Manara Planned maintenance scheduled April 17/18, 2019 at 00:00UTC (8:00pm US/Eastern)Why did the IBM 650 use bi-quinary?

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How does a biquinary adder work?



Announcing the arrival of Valued Associate #679: Cesar Manara
Planned maintenance scheduled April 17/18, 2019 at 00:00UTC (8:00pm US/Eastern)Why did the IBM 650 use bi-quinary?










8















I whipped together a quick answer to this question and then realised, that I have no idea how these tubes manipulate the numbers. A binary adder is easy to understand to the modern mind; for each bit you can use an XOR for the result, and an AND for the carry.



But what about biquinary? how does 7 + 3 work out as 0 + carry, or 2 + 3 work out as 5, or 1 + 1 = 2?



Another way to phrase the question:
What digital circuit can do an addition like this:?



 01 00010 (that's a three to you and me)
+ 01 00100 (that's two)
= 10 10000 (five; note the upper thing got flipped and the lower thing moved two spaces rightward)


How is this happening?










share|improve this question
























  • I have created the biquinary

    – Wilson
    6 hours ago






  • 2





    Off topic. The abacus uses a biquinary representation of the operands. That's about as retro as you can get.

    – Walter Mitty
    6 hours ago











  • I'm voting to close this question as off-topic because this is a question about basic electronics, not computing. Adding tubes to this doesn't change it anyway. Further there are plenty of explanation of these basics in common literature and the web.

    – Raffzahn
    2 hours ago







  • 1





    How did the adder work in the IBM 650?

    – Walter Mitty
    1 hour ago






  • 1





    @WalterMitty that's the question.

    – Wilson
    1 hour ago















8















I whipped together a quick answer to this question and then realised, that I have no idea how these tubes manipulate the numbers. A binary adder is easy to understand to the modern mind; for each bit you can use an XOR for the result, and an AND for the carry.



But what about biquinary? how does 7 + 3 work out as 0 + carry, or 2 + 3 work out as 5, or 1 + 1 = 2?



Another way to phrase the question:
What digital circuit can do an addition like this:?



 01 00010 (that's a three to you and me)
+ 01 00100 (that's two)
= 10 10000 (five; note the upper thing got flipped and the lower thing moved two spaces rightward)


How is this happening?










share|improve this question
























  • I have created the biquinary

    – Wilson
    6 hours ago






  • 2





    Off topic. The abacus uses a biquinary representation of the operands. That's about as retro as you can get.

    – Walter Mitty
    6 hours ago











  • I'm voting to close this question as off-topic because this is a question about basic electronics, not computing. Adding tubes to this doesn't change it anyway. Further there are plenty of explanation of these basics in common literature and the web.

    – Raffzahn
    2 hours ago







  • 1





    How did the adder work in the IBM 650?

    – Walter Mitty
    1 hour ago






  • 1





    @WalterMitty that's the question.

    – Wilson
    1 hour ago













8












8








8








I whipped together a quick answer to this question and then realised, that I have no idea how these tubes manipulate the numbers. A binary adder is easy to understand to the modern mind; for each bit you can use an XOR for the result, and an AND for the carry.



But what about biquinary? how does 7 + 3 work out as 0 + carry, or 2 + 3 work out as 5, or 1 + 1 = 2?



Another way to phrase the question:
What digital circuit can do an addition like this:?



 01 00010 (that's a three to you and me)
+ 01 00100 (that's two)
= 10 10000 (five; note the upper thing got flipped and the lower thing moved two spaces rightward)


How is this happening?










share|improve this question
















I whipped together a quick answer to this question and then realised, that I have no idea how these tubes manipulate the numbers. A binary adder is easy to understand to the modern mind; for each bit you can use an XOR for the result, and an AND for the carry.



But what about biquinary? how does 7 + 3 work out as 0 + carry, or 2 + 3 work out as 5, or 1 + 1 = 2?



Another way to phrase the question:
What digital circuit can do an addition like this:?



 01 00010 (that's a three to you and me)
+ 01 00100 (that's two)
= 10 10000 (five; note the upper thing got flipped and the lower thing moved two spaces rightward)


How is this happening?







biquinary






share|improve this question















share|improve this question













share|improve this question




share|improve this question








edited 6 hours ago







Wilson

















asked 6 hours ago









WilsonWilson

12.6k557144




12.6k557144












  • I have created the biquinary

    – Wilson
    6 hours ago






  • 2





    Off topic. The abacus uses a biquinary representation of the operands. That's about as retro as you can get.

    – Walter Mitty
    6 hours ago











  • I'm voting to close this question as off-topic because this is a question about basic electronics, not computing. Adding tubes to this doesn't change it anyway. Further there are plenty of explanation of these basics in common literature and the web.

    – Raffzahn
    2 hours ago







  • 1





    How did the adder work in the IBM 650?

    – Walter Mitty
    1 hour ago






  • 1





    @WalterMitty that's the question.

    – Wilson
    1 hour ago

















  • I have created the biquinary

    – Wilson
    6 hours ago






  • 2





    Off topic. The abacus uses a biquinary representation of the operands. That's about as retro as you can get.

    – Walter Mitty
    6 hours ago











  • I'm voting to close this question as off-topic because this is a question about basic electronics, not computing. Adding tubes to this doesn't change it anyway. Further there are plenty of explanation of these basics in common literature and the web.

    – Raffzahn
    2 hours ago







  • 1





    How did the adder work in the IBM 650?

    – Walter Mitty
    1 hour ago






  • 1





    @WalterMitty that's the question.

    – Wilson
    1 hour ago
















I have created the biquinary

– Wilson
6 hours ago





I have created the biquinary

– Wilson
6 hours ago




2




2





Off topic. The abacus uses a biquinary representation of the operands. That's about as retro as you can get.

– Walter Mitty
6 hours ago





Off topic. The abacus uses a biquinary representation of the operands. That's about as retro as you can get.

– Walter Mitty
6 hours ago













I'm voting to close this question as off-topic because this is a question about basic electronics, not computing. Adding tubes to this doesn't change it anyway. Further there are plenty of explanation of these basics in common literature and the web.

– Raffzahn
2 hours ago






I'm voting to close this question as off-topic because this is a question about basic electronics, not computing. Adding tubes to this doesn't change it anyway. Further there are plenty of explanation of these basics in common literature and the web.

– Raffzahn
2 hours ago





1




1





How did the adder work in the IBM 650?

– Walter Mitty
1 hour ago





How did the adder work in the IBM 650?

– Walter Mitty
1 hour ago




1




1





@WalterMitty that's the question.

– Wilson
1 hour ago





@WalterMitty that's the question.

– Wilson
1 hour ago










1 Answer
1






active

oldest

votes


















6














From a modern chip design perspective, the design of bi-quinary adders is quite simple. The addend inputs are each composed of two 1-hot signals, and the sum output is two 1-hot signals as well. This is by the nature of bi-quinary, where the quinary part is 1-hot by definition and the binary part is a 2-bit signal that is 1-hot by convention, being either 01 for "zero" or 10 for "five". The latter also being 1-hot makes things easier.



A simple AND-OR tree suffices for adding these. In a biquinary half-adder each one of the outputs in the sum is just a multiple-input OR of the ANDs of the various input combinations that result in that digit. For examples: C4 is a multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "four" in the quinary part. C00 is multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "zero" in the binary part.



In a biquinary full-adder there is not all that much added complexity. The carry-in simply left-rotates the quinary part of one of the addends, and any rotation off the left-hand end of that addend is an extra input to the tree that sums the binary parts, alongside any carry from the addition of the quinary parts.



That is the modern view, at any rate. It was not quite done that way back in the days of relays.



The AND-OR tree was a matrix of relays, each combination of signals opening up a specific path (to ground) for the appropriate 1-hot outputs.



Carry-in and carry-out were also a 1-hot pair of wires, 01 for "no carry" and 10 for "carry". This, in combination with the binary parts of each addend being 1-hot, meant that the "binary side" of the adder was also a simple exercise in AND-OR logic, and a relay matrix too. And, of course, so to was the rotation.



Caesaro 1946 has a diagram of the relay matrix for a 1-digit biquinary full-adder in the Bell Laboratories' Relay Interpolator. Das et al. 2015 has a more modern block diagram and truth tables for the various outputs. It places the carry-in handling logic closer to the final output, rotating an intermediate result instead of one of the addends, does not have 1-hot carry, does not have 1-hot binary parts for the addends, and uses inverters (where a 1-hot design of course does not).



Further reading



  • O. Caesaro (1946). "The Relay Interpolator". In B. Randell: The Origins of Digital Computers: Selected Papers. Springer Science & Business Media. 2012. ISBN 9783642961458. DOI: 10.1007/978-3-642-61812-3_20

  • Kunal Das, Arijit Dey, Dipannita Podder, Mallika De, and Debashis De (2015). "Quantum Dot Cellular Automata: A Promising Paradigm Beyond Moore". In Mourad Fakhfakh, Esteban Tlelo-Cuautle, and Patrick Siarry: Computational Intelligence in Digital and Network Designs and Applications. Springer. ISBN 9783319200712. DOI: 10.1007/978-3-319-20071-2_11.

  • William Keister (1951). "Circuits for calculation". The Design of Switching Circuits. Bell Telephone Laboratories series. Van Nostrand. pp. 462–472.





share|improve this answer























  • In short, you use a "lookup table", just like when kids first learn addition. This is realized in hardware as a relay matrix. I'd still love to see how this was actually wired in something like the IBM 650, though - did they actually use the full 5x5 matrix (for the quinary part), or did they find some way to reduce it? How many relays (or tubes, in 650) did the full adder take? In any case, great answer, and especially the Keister reference goes very deep into the subject matter :)

    – Luaan
    1 hour ago











Your Answer








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1 Answer
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1 Answer
1






active

oldest

votes









active

oldest

votes






active

oldest

votes









6














From a modern chip design perspective, the design of bi-quinary adders is quite simple. The addend inputs are each composed of two 1-hot signals, and the sum output is two 1-hot signals as well. This is by the nature of bi-quinary, where the quinary part is 1-hot by definition and the binary part is a 2-bit signal that is 1-hot by convention, being either 01 for "zero" or 10 for "five". The latter also being 1-hot makes things easier.



A simple AND-OR tree suffices for adding these. In a biquinary half-adder each one of the outputs in the sum is just a multiple-input OR of the ANDs of the various input combinations that result in that digit. For examples: C4 is a multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "four" in the quinary part. C00 is multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "zero" in the binary part.



In a biquinary full-adder there is not all that much added complexity. The carry-in simply left-rotates the quinary part of one of the addends, and any rotation off the left-hand end of that addend is an extra input to the tree that sums the binary parts, alongside any carry from the addition of the quinary parts.



That is the modern view, at any rate. It was not quite done that way back in the days of relays.



The AND-OR tree was a matrix of relays, each combination of signals opening up a specific path (to ground) for the appropriate 1-hot outputs.



Carry-in and carry-out were also a 1-hot pair of wires, 01 for "no carry" and 10 for "carry". This, in combination with the binary parts of each addend being 1-hot, meant that the "binary side" of the adder was also a simple exercise in AND-OR logic, and a relay matrix too. And, of course, so to was the rotation.



Caesaro 1946 has a diagram of the relay matrix for a 1-digit biquinary full-adder in the Bell Laboratories' Relay Interpolator. Das et al. 2015 has a more modern block diagram and truth tables for the various outputs. It places the carry-in handling logic closer to the final output, rotating an intermediate result instead of one of the addends, does not have 1-hot carry, does not have 1-hot binary parts for the addends, and uses inverters (where a 1-hot design of course does not).



Further reading



  • O. Caesaro (1946). "The Relay Interpolator". In B. Randell: The Origins of Digital Computers: Selected Papers. Springer Science & Business Media. 2012. ISBN 9783642961458. DOI: 10.1007/978-3-642-61812-3_20

  • Kunal Das, Arijit Dey, Dipannita Podder, Mallika De, and Debashis De (2015). "Quantum Dot Cellular Automata: A Promising Paradigm Beyond Moore". In Mourad Fakhfakh, Esteban Tlelo-Cuautle, and Patrick Siarry: Computational Intelligence in Digital and Network Designs and Applications. Springer. ISBN 9783319200712. DOI: 10.1007/978-3-319-20071-2_11.

  • William Keister (1951). "Circuits for calculation". The Design of Switching Circuits. Bell Telephone Laboratories series. Van Nostrand. pp. 462–472.





share|improve this answer























  • In short, you use a "lookup table", just like when kids first learn addition. This is realized in hardware as a relay matrix. I'd still love to see how this was actually wired in something like the IBM 650, though - did they actually use the full 5x5 matrix (for the quinary part), or did they find some way to reduce it? How many relays (or tubes, in 650) did the full adder take? In any case, great answer, and especially the Keister reference goes very deep into the subject matter :)

    – Luaan
    1 hour ago















6














From a modern chip design perspective, the design of bi-quinary adders is quite simple. The addend inputs are each composed of two 1-hot signals, and the sum output is two 1-hot signals as well. This is by the nature of bi-quinary, where the quinary part is 1-hot by definition and the binary part is a 2-bit signal that is 1-hot by convention, being either 01 for "zero" or 10 for "five". The latter also being 1-hot makes things easier.



A simple AND-OR tree suffices for adding these. In a biquinary half-adder each one of the outputs in the sum is just a multiple-input OR of the ANDs of the various input combinations that result in that digit. For examples: C4 is a multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "four" in the quinary part. C00 is multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "zero" in the binary part.



In a biquinary full-adder there is not all that much added complexity. The carry-in simply left-rotates the quinary part of one of the addends, and any rotation off the left-hand end of that addend is an extra input to the tree that sums the binary parts, alongside any carry from the addition of the quinary parts.



That is the modern view, at any rate. It was not quite done that way back in the days of relays.



The AND-OR tree was a matrix of relays, each combination of signals opening up a specific path (to ground) for the appropriate 1-hot outputs.



Carry-in and carry-out were also a 1-hot pair of wires, 01 for "no carry" and 10 for "carry". This, in combination with the binary parts of each addend being 1-hot, meant that the "binary side" of the adder was also a simple exercise in AND-OR logic, and a relay matrix too. And, of course, so to was the rotation.



Caesaro 1946 has a diagram of the relay matrix for a 1-digit biquinary full-adder in the Bell Laboratories' Relay Interpolator. Das et al. 2015 has a more modern block diagram and truth tables for the various outputs. It places the carry-in handling logic closer to the final output, rotating an intermediate result instead of one of the addends, does not have 1-hot carry, does not have 1-hot binary parts for the addends, and uses inverters (where a 1-hot design of course does not).



Further reading



  • O. Caesaro (1946). "The Relay Interpolator". In B. Randell: The Origins of Digital Computers: Selected Papers. Springer Science & Business Media. 2012. ISBN 9783642961458. DOI: 10.1007/978-3-642-61812-3_20

  • Kunal Das, Arijit Dey, Dipannita Podder, Mallika De, and Debashis De (2015). "Quantum Dot Cellular Automata: A Promising Paradigm Beyond Moore". In Mourad Fakhfakh, Esteban Tlelo-Cuautle, and Patrick Siarry: Computational Intelligence in Digital and Network Designs and Applications. Springer. ISBN 9783319200712. DOI: 10.1007/978-3-319-20071-2_11.

  • William Keister (1951). "Circuits for calculation". The Design of Switching Circuits. Bell Telephone Laboratories series. Van Nostrand. pp. 462–472.





share|improve this answer























  • In short, you use a "lookup table", just like when kids first learn addition. This is realized in hardware as a relay matrix. I'd still love to see how this was actually wired in something like the IBM 650, though - did they actually use the full 5x5 matrix (for the quinary part), or did they find some way to reduce it? How many relays (or tubes, in 650) did the full adder take? In any case, great answer, and especially the Keister reference goes very deep into the subject matter :)

    – Luaan
    1 hour ago













6












6








6







From a modern chip design perspective, the design of bi-quinary adders is quite simple. The addend inputs are each composed of two 1-hot signals, and the sum output is two 1-hot signals as well. This is by the nature of bi-quinary, where the quinary part is 1-hot by definition and the binary part is a 2-bit signal that is 1-hot by convention, being either 01 for "zero" or 10 for "five". The latter also being 1-hot makes things easier.



A simple AND-OR tree suffices for adding these. In a biquinary half-adder each one of the outputs in the sum is just a multiple-input OR of the ANDs of the various input combinations that result in that digit. For examples: C4 is a multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "four" in the quinary part. C00 is multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "zero" in the binary part.



In a biquinary full-adder there is not all that much added complexity. The carry-in simply left-rotates the quinary part of one of the addends, and any rotation off the left-hand end of that addend is an extra input to the tree that sums the binary parts, alongside any carry from the addition of the quinary parts.



That is the modern view, at any rate. It was not quite done that way back in the days of relays.



The AND-OR tree was a matrix of relays, each combination of signals opening up a specific path (to ground) for the appropriate 1-hot outputs.



Carry-in and carry-out were also a 1-hot pair of wires, 01 for "no carry" and 10 for "carry". This, in combination with the binary parts of each addend being 1-hot, meant that the "binary side" of the adder was also a simple exercise in AND-OR logic, and a relay matrix too. And, of course, so to was the rotation.



Caesaro 1946 has a diagram of the relay matrix for a 1-digit biquinary full-adder in the Bell Laboratories' Relay Interpolator. Das et al. 2015 has a more modern block diagram and truth tables for the various outputs. It places the carry-in handling logic closer to the final output, rotating an intermediate result instead of one of the addends, does not have 1-hot carry, does not have 1-hot binary parts for the addends, and uses inverters (where a 1-hot design of course does not).



Further reading



  • O. Caesaro (1946). "The Relay Interpolator". In B. Randell: The Origins of Digital Computers: Selected Papers. Springer Science & Business Media. 2012. ISBN 9783642961458. DOI: 10.1007/978-3-642-61812-3_20

  • Kunal Das, Arijit Dey, Dipannita Podder, Mallika De, and Debashis De (2015). "Quantum Dot Cellular Automata: A Promising Paradigm Beyond Moore". In Mourad Fakhfakh, Esteban Tlelo-Cuautle, and Patrick Siarry: Computational Intelligence in Digital and Network Designs and Applications. Springer. ISBN 9783319200712. DOI: 10.1007/978-3-319-20071-2_11.

  • William Keister (1951). "Circuits for calculation". The Design of Switching Circuits. Bell Telephone Laboratories series. Van Nostrand. pp. 462–472.





share|improve this answer













From a modern chip design perspective, the design of bi-quinary adders is quite simple. The addend inputs are each composed of two 1-hot signals, and the sum output is two 1-hot signals as well. This is by the nature of bi-quinary, where the quinary part is 1-hot by definition and the binary part is a 2-bit signal that is 1-hot by convention, being either 01 for "zero" or 10 for "five". The latter also being 1-hot makes things easier.



A simple AND-OR tree suffices for adding these. In a biquinary half-adder each one of the outputs in the sum is just a multiple-input OR of the ANDs of the various input combinations that result in that digit. For examples: C4 is a multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "four" in the quinary part. C00 is multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "zero" in the binary part.



In a biquinary full-adder there is not all that much added complexity. The carry-in simply left-rotates the quinary part of one of the addends, and any rotation off the left-hand end of that addend is an extra input to the tree that sums the binary parts, alongside any carry from the addition of the quinary parts.



That is the modern view, at any rate. It was not quite done that way back in the days of relays.



The AND-OR tree was a matrix of relays, each combination of signals opening up a specific path (to ground) for the appropriate 1-hot outputs.



Carry-in and carry-out were also a 1-hot pair of wires, 01 for "no carry" and 10 for "carry". This, in combination with the binary parts of each addend being 1-hot, meant that the "binary side" of the adder was also a simple exercise in AND-OR logic, and a relay matrix too. And, of course, so to was the rotation.



Caesaro 1946 has a diagram of the relay matrix for a 1-digit biquinary full-adder in the Bell Laboratories' Relay Interpolator. Das et al. 2015 has a more modern block diagram and truth tables for the various outputs. It places the carry-in handling logic closer to the final output, rotating an intermediate result instead of one of the addends, does not have 1-hot carry, does not have 1-hot binary parts for the addends, and uses inverters (where a 1-hot design of course does not).



Further reading



  • O. Caesaro (1946). "The Relay Interpolator". In B. Randell: The Origins of Digital Computers: Selected Papers. Springer Science & Business Media. 2012. ISBN 9783642961458. DOI: 10.1007/978-3-642-61812-3_20

  • Kunal Das, Arijit Dey, Dipannita Podder, Mallika De, and Debashis De (2015). "Quantum Dot Cellular Automata: A Promising Paradigm Beyond Moore". In Mourad Fakhfakh, Esteban Tlelo-Cuautle, and Patrick Siarry: Computational Intelligence in Digital and Network Designs and Applications. Springer. ISBN 9783319200712. DOI: 10.1007/978-3-319-20071-2_11.

  • William Keister (1951). "Circuits for calculation". The Design of Switching Circuits. Bell Telephone Laboratories series. Van Nostrand. pp. 462–472.






share|improve this answer












share|improve this answer



share|improve this answer










answered 3 hours ago









JdeBPJdeBP

40526




40526












  • In short, you use a "lookup table", just like when kids first learn addition. This is realized in hardware as a relay matrix. I'd still love to see how this was actually wired in something like the IBM 650, though - did they actually use the full 5x5 matrix (for the quinary part), or did they find some way to reduce it? How many relays (or tubes, in 650) did the full adder take? In any case, great answer, and especially the Keister reference goes very deep into the subject matter :)

    – Luaan
    1 hour ago

















  • In short, you use a "lookup table", just like when kids first learn addition. This is realized in hardware as a relay matrix. I'd still love to see how this was actually wired in something like the IBM 650, though - did they actually use the full 5x5 matrix (for the quinary part), or did they find some way to reduce it? How many relays (or tubes, in 650) did the full adder take? In any case, great answer, and especially the Keister reference goes very deep into the subject matter :)

    – Luaan
    1 hour ago
















In short, you use a "lookup table", just like when kids first learn addition. This is realized in hardware as a relay matrix. I'd still love to see how this was actually wired in something like the IBM 650, though - did they actually use the full 5x5 matrix (for the quinary part), or did they find some way to reduce it? How many relays (or tubes, in 650) did the full adder take? In any case, great answer, and especially the Keister reference goes very deep into the subject matter :)

– Luaan
1 hour ago





In short, you use a "lookup table", just like when kids first learn addition. This is realized in hardware as a relay matrix. I'd still love to see how this was actually wired in something like the IBM 650, though - did they actually use the full 5x5 matrix (for the quinary part), or did they find some way to reduce it? How many relays (or tubes, in 650) did the full adder take? In any case, great answer, and especially the Keister reference goes very deep into the subject matter :)

– Luaan
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